CVE and update status of the FreeBSD ports tree3,864 unaddressed CVEs in 671 portsAll times are CET
Port details

cad/py-verilog-parser 0.0.7

Lark-based parser for structural Verilog netlists

Port info

Maintainer
spaciouscoder78@disroot.org
Packages
latest: 0.0.7
Upstream
up to date
Last update
to 0.0.7 · 0c3b043861
Quarterly
2026Q4: 0.0.7
WWW
https://codeberg.org/tok/py-verilog-parser
Links
cgit · VuXML

Install

Package
# pkg install py312-verilog_parser
installs 0.0.7 from latest; from quarterly (2026Q4) 0.0.7
Port
# cd /usr/ports/cad/py-verilog-parser && make install clean
Size
18 KiB download · 81 KiB installed
Depends on
lang/python312 3.12.15
License
AGPLv3+

Packages by version and architecture

latest

FreeBSD versionamd64aarch64i386
FreeBSD 160.0.70.0.7–
FreeBSD 150.0.70.0.7–
FreeBSD 140.0.70.0.70.0.7

quarterly (2026Q4)

FreeBSD versionamd64aarch64i386
FreeBSD 150.0.70.0.7–
FreeBSD 140.0.70.0.70.0.7

version as in the ports tree (latest) or the most common one (quarterly) · different version · ✗ not built · – no packages for this platform. Package sets that have not been rebuilt for 60 days are left out.

Unaddressed and VuXML only (0)

No unaddressed CVE and nothing reported by pkg audit for the packaged version 0.0.7.

Fixed (0)

No VuXML entries for this package.

Problem reports (0) · open in Bugzilla, most recently changed first

None.

Commits (1)

Älven (alven) · 0.0.7
cad/py-verilog-parser: [NEW PORT] Lark-based parser for structural Verilog netlists

PR:		290373
Approved by:	yuri@ (Mentor)
0c3b043861